1. Field of the Invention
The present invention relates to a gamma correction circuit for implementing favorable gradation and contrast of reproduced images in display devices such as a liquid crystal display device (hereinafter referred to as LCD), a plasma display panel (hereinafter referred to as PDP) and a digital micromirror device (hereinafter referred to as DMD).
2. Description of the Related Art
In recent years, display devices such as LCDs, PDPs and DMDs have attracted attention. Gamma characteristics of these new display devices are different from characteristics of the cathode-ray tube (hereinafter referred to as CRT) type heretofore used. In addition, display devices such as LCDs, PDPs and DMDs have also different characteristic, respectively.
Furthermore, in current television broadcast, the gamma correction is conducted on an image transmitting side so as to cancel the gamma characteristic of a display side by supposing that the display device uses a CRT.
In the case where a LCD, a PDP or a DMD is used as display device, it is necessary to correct the gamma characteristic of the image transmitting side and simultaneously therewith correct the gamma characteristic of each of display devices such as LCDS, PDPs or DMDs.
As for a circuit for implementing such gamma correction having a variable characteristic, the circuit typically includes a look up table (hereinafter referred to as LUT) for specifying a predetermined characteristic by using a ROM or the like as described, for example, in JP-A-8-190363 and JP-A-8-194450 as laid-open gazette.
A gamma correction circuit 100 using a LUT shown in FIG. 3 includes input terminals 101 to 103 respectively supplied with image signals of three systems, i.e., R (Red), G (Green) and B (Blue) before gamma correction, processing circuits 111 to 113 for correcting gamma characteristics respectively for the systems of R, G and B, LUTs 121 to 123 each having a plurality of LUTs for storing beforehand gamma characteristics conformed to display devices, a control circuit 130 for selecting one of the plurality of LUTs for each of LUTs 121 to 123 of the respective systems in conformity with the gamma characteristic of the display device, and output terminals 141 to 143 for outputting image signals after gamma correction. The LUTs 121 to 123 are stored in a ROM 120. As exemplified by the R system, a plurality of LUTs 121-1 to 121-n storing different gamma characteristics are included.
In the gamma correction circuit 100 having LUTs as shown in FIG. 3, as many tables as corresponding gamma characteristics must be prepared. In addition, it is necessary to determine the gamma characteristic and store it in the ROM beforehand. Therefore, for obtaining a gamma correction circuit corresponding to a plurality of display devices differing in gamma characteristic, such as a CRT, LCD, PDP and DMD, and corresponding to a signal subject to gamma correction beforehand, such as a TV signal, and a plurality of signals which have not been subjected to gamma correction, such as PC (personal computer) signals, the circuit scale becomes large. It is not easy to alter the gamma characteristic from the outside.
An object of the present invention is to provide a gamma correction circuit capable of altering the gamma correction characteristic according to the gamma characteristic of the display device and capable of altering the gamma correction characteristic according to the input signal, by using a small circuit scale.
In accordance with the present invention, a gamma correction circuit includes a node level setting unit and a gamma correction unit. An encoded M-bit (where M is an arbitrary integer) video signal is represented by using a predetermined number of sections. Level values of the video signal predetermined so as to be respectively associated with 2n+1 number of nodes (where n is an arbitrary integer) respectively determined for the sections are set in the node level setting unit from an outside. The gamma correction unit executes gamma correction of the M-bit video signal according to level values of the nodes set in the node level setting unit.
On a gamma characteristic curve representing the encoded M-bit video signal by using 2n number of sections, a level of the video signal in the M sections is represented by using the 2n+1 number of nodes. In this case, level values of the video signal predetermined so as to be respectively associated with the nodes can be set in the node level setting unit from the outside.
The gamma correction unit may include a selection circuit supplied with level values of the 2n number of nodes from the node level setting unit. The selection circuit selects and outputs a level value of a start point and a level value of an end point of each of segments virtually connected between nodes, out of the 2n+1 number of level values specified by the node level setting unit.
The selection circuit may includes a first selection circuit and a second selection circuit each supplied with level values of 2n number of nodes from the node level setting unit. The first selection circuit and the second selection circuit respectively select and output the level value of the start point and the level value of the end point of each of segments virtually connected between the nodes, out of the 2n+1 number of level values specified by the node level setting unit.
The gamma correction unit may include a first control circuit for controlling the first and second selection circuits by using a value of N high-order bits (where N is an arbitrary integer) specifying the segment out of the M-bit video signal inputted from the video signal input terminal.
The gamma correction unit may include an addition circuit for calculating a mixture ratio, according to which level values of the end point and the start point outputted from the first and second selection circuits are mixed, by using a coefficient and predetermined computation, and generating a gamma corrected video signal.
The gamma correction unit may include a second control circuit for calculating the coefficient from a value of (Mxe2x88x92N) low-order bits included in the M-bit video signal inputted from the video signal input terminal, by predetermined computation.
The node level setting unit may be connected to shift registers storing beforehand level values indicating the nodes, and the level values may be inputted from the shift registers to the node level setting unit.
The shift registers may be connected to a microprocessor, and level values of the nodes may be indicated from the microprocessor according to a characteristic of the display device.
The first control circuit may specify the segment by a value of N high-order bits out of the M-bit video signal, cause the first selection circuit to output a level value of a start point of the segment, and cause the second selection circuit to output a level value of an end point of the segment.
The node level setting unit and the gamma correction unit may be provided in a circuit of each of R system, B system and G system.